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A publicação pode ser exportada nos seguintes formatos: referência da APA (American Psychological Association), referência do IEEE (Institute of Electrical and Electronics Engineers), BibTeX e RIS.

Exportar Referência (APA)
Serra, A., Dias, L., Serrão, C., Dias, J. & Trezentos, P. (2004). Parallel JPEG2000 Encoding on a Beowulf Cluster. In Nuno Guimarães and Pedro Isaías (Ed.), Proc International Conference – Aplied Computig 2004, IADIS 2004, Lisboa. Lisboa: IADIS.
Exportar Referência (IEEE)
A. Serra et al.,  "Parallel JPEG2000 Encoding on a Beowulf Cluster", in Proc Int. Conf. – Aplied Computig 2004, IADIS 2004, Lisboa, Nuno Guimarães and Pedro Isaías, Ed., Lisboa, IADIS, 2004
Exportar BibTeX
@inproceedings{serra2004_1709567227919,
	author = "Serra, A. and Dias, L. and Serrão, C. and Dias, J. and Trezentos, P.",
	title = "Parallel JPEG2000 Encoding on a Beowulf Cluster",
	booktitle = "Proc International Conference – Aplied Computig 2004, IADIS 2004, Lisboa",
	year = "2004",
	editor = "Nuno Guimarães and Pedro Isaías",
	volume = "",
	number = "",
	series = "",
	publisher = "IADIS",
	address = "Lisboa",
	organization = ""
}
Exportar RIS
TY  - CPAPER
TI  - Parallel JPEG2000 Encoding on a Beowulf Cluster
T2  - Proc International Conference – Aplied Computig 2004, IADIS 2004, Lisboa
AU  - Serra, A.
AU  - Dias, L.
AU  - Serrão, C.
AU  - Dias, J.
AU  - Trezentos, P.
PY  - 2004
CY  - Lisboa
AB  - This paper describes a methodology and computing architecture for the parallelization of an open-source JPEG2000 (or 
J2K) digital image encoder, applicable in Beowulf-type Clusters. It starts by providing an overview of the technical 
architecture solution chosen for the J2K image encoding cluster, justifying the choices made. The encoding 
algorithm is then presented, both in its original standalone as well as in the parallel versions, discussing which were the 
modifications performed in the original version to improve its performance on a high-performance computing platform, 
such as the Beowulf Cluster. Several tests were performed on the encoder, with the achieved results assessed by standard 
evaluation metrics of parallel algorithms. Those results are presented and discussed, showing the appropriateness of our 
approach. The major focus of this paper is on the High-Performance Computing aspects of the solution, reinforcing the 
idea that high-performance solutions may be obtained through relatively low-cost hardware architecture solutions. Finally, 
some conclusions are drawn, and the directions for future work are given.
ER  -