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Serra, A., Trezentos, P., Serrão, C., Dias, L. & Dias, J. (2003). Increasing the Performance of JPEG2000 Encoding through High-Performance Computing. In Mohamed Hamza (Ed.), Proc of Visualization, Imaging, and Image Processing (VIIP 2003), Benalmadena, Málaga. Benalmádena: Acta Press.

A. Serra et al.,  "Increasing the Performance of JPEG2000 Encoding through High-Performance Computing", in Proc of Visualization, Imaging, and Image Processing (VIIP 2003), Benalmadena, Málaga, Mohamed Hamza, Ed., Benalmádena, Acta Press, 2003

@inproceedings{serra2003_1732209256394,
	author = "Serra, A. and Trezentos, P. and Serrão, C. and Dias, L. and Dias, J.",
	title = "Increasing the Performance of JPEG2000 Encoding through High-Performance Computing",
	booktitle = "Proc of Visualization, Imaging, and Image Processing (VIIP 2003), Benalmadena, Málaga",
	year = "2003",
	editor = "Mohamed Hamza",
	volume = "",
	number = "",
	series = "",
	publisher = "Acta Press",
	address = "Benalmádena",
	organization = "",
	url = "https://www.actapress.com/Abstract.aspx?paperId=14335"
}

TY  - CPAPER
TI  - Increasing the Performance of JPEG2000 Encoding through High-Performance Computing
T2  - Proc of Visualization, Imaging, and Image Processing (VIIP 2003), Benalmadena, Málaga
AU  - Serra, A.
AU  - Trezentos, P.
AU  - Serrão, C.
AU  - Dias, L.
AU  - Dias, J.
PY  - 2003
SN  - 1482-7921
CY  - Benalmádena
UR  - https://www.actapress.com/Abstract.aspx?paperId=14335
AB  - This paper describes a methodology for parallelizing a JPEG2000 encoder through the usage of a Beowulf Cluster and an already existing open-source JPEG2000 encoding software. It starts by giving an overview of the technical architecture solution chosen for the image cluster, justifying the choices that were followed. Next, the coding algorithm is presented, both on its nonparallel as well as the parallel version, discussing which were the modifications performed in the original version to improve its performance on a high-performance computing platform. Afterward, the tests that were performed on the encoder are presented and the results achieved are discussed. Finally, some conclusions and future work are presented. The major focus of this paper is on High-Performance Computing hardware aspects of the proposed solution, reinforcing the idea that high-performance solutions might be obtained through relatively low-cost hardware architecture solutions-
ER  -