Semiconductor wafer defect detection faces a critical challenge: traditional supervised methods require extensive labeled datasets that are costly to obtain. This paper presents a novel self-supervised approach combining Graph Neural Networks (GNNs) with contrastive learning for defect detection that minimizes reliance on labeled training data. Our method introduces a theoretically-grounded graph construction using 8-connectivity patterns that preserves spatial locality, with edge weights capturing geometric and semantic relationships. The core innovation is a multi-criteria contrastive learning framework incorporating spatial pattern similarity, defect density proximity, and production lot relationships to define positive-negative pairs using domain-driven heuristics rather than manual annotations. We implement this using a Graph Isomorphism Network (GIN) with jumping knowledge connections for multi-scale defect patterns. Evaluation on the WM-811K dataset (811,457 wafer maps from 46,293 lots) demonstrates that unsupervised clustering on learned embeddings achieves ARI of 0.89 and NMI of 0.87, while supervised fine-tuning on these embeddings yields 98.6% classification accuracy (ARI 0.98, NMI 0.96), maintaining 95.7% accuracy with only 25% labeled data. Our approach handles class imbalance (91.5% normal vs. 8.5% defective) across 9 defect patterns. Deployment analysis shows 8.3ms inference time, 387MB memory footprint, and 78% cost reduction versus manual inspection, with robustness to sensor noise and an 89.3% out-of-distribution detection rate. This provides the first contrastive learning-GNN application for wafer defect detection, offering scalable industrial quality control where labeled data is scarce.

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Self-supervised learning,Wafer defect detection,Contrastive learning,Graph neural networks,Clustering,Semiconductor manufacturing

• Electrical Engineering, Electronic Engineering, Information Engineering - Engineering and Technology