Publication in conference proceedings
An FPGA-based weightless neural network for edge network intrusion detection
Zachary Susskind (Susskind, Z.); Aman Arora (Arora, A.); Alan T. L. Bacellar (Bacellar, A.); Diego Leonel Cadette Dutra (Dutra, D. L. C.); Igor D. S. Miranda (Miranda, I. D. S.); Maurício Breternitz (Breternitz Jr., M.); Priscila M.V. Lima (Lima, P. M. V.); Felipe Maia Galvão França (França, F. M. G.); Lizy K. John (John, L. K.); et al.
FPGA '23: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays
Year (definitive publication)
2023
Language
English
Country
United States of America
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(Last checked: 2024-11-18 15:54)

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Abstract
The last decade has seen an explosion in the number of networked edge and Internet-of-Things (IoT) devices, a trend which shows no signs of slowing. Concurrently, networking is increasingly moving away from centralized cloud servers and towards base stations and the edge devices themselves, with the objective of decreasing latency and improving the user experience. ASICs typically lack the flexibility needed to update algorithms or adapt to specific user scenarios, which is becoming increasingly important with the emergence of 6G. While FPGAs have the potential to address these issues, their inferior energy and area efficiency and high unit cost mean that FPGA-based designs must be very aggressively optimized to be viable. In this paper, we propose FWIW, a novel FPGA-based solution for detecting anomalous or malicious network traffic on edge devices. While prior work in this domain is based on conventional deep neural networks (DNNs), FWIW incorporates a weightless neural network (WNN), a table lookup-based model which learns sophisticated nonlinear behaviors. This allows FWIW to achieve accuracy far superior to prior FPGA-based work at a very small fraction of the model footprint, enabling deployment on edge devices. FWIW achieves a prediction accuracy of 98.5% on the UNSW-NB15 dataset with a total model parameter size of just 192 bytes, reducing error by 7.9x and model size by 262x vs. the prior work. Implemented on a Xilinx Virtex UltraScale+ FPGA, FWIW demonstrates a 59x reduction in LUT usage with a 1.6x increase in throughput. The accuracy of FWIW comes within 0.6% of the best-reported result in literature, a model several orders of magnitude larger. Our results make it clear that WNNs are worth exploring in the emerging domain of edge networking, and suggest that FPGAs are capable of providing the extreme throughput needed.
Acknowledgements
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Keywords
  • Computer and Information Sciences - Natural Sciences
  • Electrical Engineering, Electronic Engineering, Information Engineering - Engineering and Technology
Funding Records
Funding Reference Funding Entity
3015.001/3016.001 Semiconductor Research Corporation (SRC)
1763848 Fundação para a Ciência e a Tecnologia

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